ADSP-214xx SHARC Processor Hardware Reference A-291
Registers Reference
PWMDT3 0x3413 PWM Dead Time 3 0x0
PWMA3 0x3415 PWM Channel A Duty Control 3 0x0
PWMB3 0x3416 PWM Channel B Duty Control 3 0x0
PWMSEG3 0x3418 PWM Output Enable 3 0x0
PWMAL3 0x341A PWM Channel AL Duty Control 3 0x0
PWMBL3 0x341B PWM Channel BL Duty Control 3 0x0
PWMDBG3 0x341E PWM Debug Status 3 0x0
PWMPOL3 0x341F PWM Output Polarity Select 3 0x00FF
Memory-to-Memory DMA Registers
MTMCTL 0x2C01 Memory-to-Memory DMA Control 0x0
IIMTMW 0x2C10 MTM DMA Destination Index 0x0
IIMTMR 0x2C11 MTM DMA Source Index 0x0
IMMTMW 0x2C0E MTM DMA Destination Modify 0x0
IMMTMR 0x2C0F MTM DMA Source Modify 0x0
CMTMW 0x2C16 MTM DMA Destination Count 0x0
CMTMR 0x2C17 MTM DMA Source Count 0x0
FFT Accelerator Registers
FFTCTL1 0x5300 FFT Global Control 0x0
FFTCTL2 0x530C Channel Control 0x0
FFTMACSTAT 0x5302 MAC Status 0x0
FFTDADDR 0x5303 Debug Address 0x0
FFTDDATA 0x5304 Debug Data 0x0
IIFFT 0x5310 Input Index 0x0
IMFFT 0x5311 Input Modifier 0x0
ICFFT 0x5312 Input Count 0x0
ILFFT 0x5313 Input Length 0x0
IBFFT 0x5314 Input Base 0x0
Register Mnemonic Address Description Reset
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