ADSP-214xx SHARC Processor Hardware Reference xxxi
 
Contents
INPUT DATA PORT
Features ...................................................................................... 11-2
Pin Descriptions  ......................................................................... 11-3
SRU Programming ...................................................................... 11-5
Register Overview  ....................................................................... 11-5
Clocking ..................................................................................... 11-6
Functional Description  ............................................................... 11-6
Operating Modes  ........................................................................ 11-8
PDAP Port Selection  ............................................................. 11-9
Data Hold ............................................................................. 11-9
PDAP Data Masking  ........................................................... 11-10
PDAP Data Packing  ............................................................ 11-10
No Packing  ..................................................................... 11-10
Packing by 2  ...................................................................  11-11
Packing by 3  ...................................................................  11-12
Packing by 4  ...................................................................  11-13
Data Transfer  ............................................................................ 11-14
Data Buffer  ......................................................................... 11-14
Core Transfers   ....................................................................  11-15
SIP Data Buffer Format ...................................................  11-16
PDAP Data Buffer Format ..............................................  11-18
DMA Transfers .................................................................... 11-19
Data Buffer Format for DMA ..........................................  11-19
DMA Channel Priority ...................................................  11-20