Analog Devices SHARC ADSP-214 Series - Page 42

Contents
xlii ADSP-214xx SHARC Processor Hardware Reference
Operating Modes ........................................................................ 20-8
Data Packing ........................................................................ 20-8
9-Bit Transmission Mode ...................................................... 20-8
Packed Mode .................................................................... 20-9
Data Transfer Types .................................................................. 20-10
Data Buffers ....................................................................... 20-10
Transmit Holding Registers (UARTTHR) ....................... 20-10
Receive Buffer Registers (UARTRBR) ............................. 20-11
Core Transfers ..................................................................... 20-12
DMA Transfers ................................................................... 20-13
DMA Chaining .............................................................. 20-14
Interrupts ................................................................................. 20-14
Interrupt Routing ............................................................... 20-15
DPI ................................................................................ 20-15
UART ............................................................................ 20-16
DMA Interrupts .................................................................. 20-16
Core Interrupts ................................................................... 20-17
Error Interrupts .................................................................. 20-19
Debug Features ......................................................................... 20-20
Shadow Registers ................................................................ 20-20
Shadow Buffer .................................................................... 20-20
Loop Back Routing ............................................................. 20-20
Effect Latency .......................................................................... 20-20
Write Effect Latency ........................................................... 20-21
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