ADSP-214xx SHARC Processor Hardware Reference 3-99
External Port
in external memory, the external memory address range has been divided
into two ranges:
• Normal word – 0x20 0000 to 0x5F FFFF
• Short word – 0x60 0000 to 0xFF FFFF
When the processor accesses any instruction from the external normal
word space, the instruction is deemed to have the traditional SHARC
instruction encoding. When the processor accesses any instruction from
external short word space, the instruction is deemed to have the new VISA
instruction encoding.
For a x16 memory, the external port interface effectively translates the
addresses in range 0x20 0000 – 0x5F FFFF to 0x60 0000 – 0x11F FFFF,
when accessing 48-bit instructions in legacy (ISA) encoding from external
memory. The external port performs three accesses to form one 48-bit
word before forwarding it to the IAB.
Note that that external port interface passes the addresses in the range
0x60 0000 – 0xFF FFFF as is to external memory. As in the previous case,
the external port accesses three short words to return a 48-bit word to the
IAB for each access requested by the sequencer. The short words for a
VISA section of code are packed in such a way that lowest of the addresses
pertaining to a given instruction has the most significant short word of
that instruction and the highest address has the least significant short
word (see Figure 3-20).
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