ADSP-214xx SHARC Processor Hardware Reference 9-17
Digital Application/Digital Peripheral Interfaces
The SRU for the DAI contains seven groups that are named sequentially A
through F. Each group routes a unique set of signals with a specific pur-
pose as shown below.
• Group A routes clock signals
• Group B routes serial data signals
• Group C routes frame sync signals
• Group D routes pin signals
• Group E routes miscellaneous signals
• Group F routes pin output enable signals
• Group G routes all shift register signals (ADSP-2147x only)
Together, the SRU’s seven groups include all of the inputs and outputs of
the DAI peripherals, a number of additional signals from the core, and all
of the connections to the DAI pins.
The SRU2 for DPI contains three groups that are named sequentially A
through C. Each group routes various signals with a specific purpose:
• Group A routes miscellaneous signals
• Group B routes pin output signals
• Group C routes pin output enable signals
Unlike SRU in the DAI module, all types of functionality such as
clock and data are merged into the same group in the DPI periph-
eral.
Note that it is not possible to connect a signal in one group directly
to signal in a different group (analogous to wiring from one patch
bay to another). However, group D (DAI) or group B (DPI) is
largely devoted to routing in this vein.
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