ADSP-214xx SHARC Processor Hardware Reference 10-3
Serial Ports
unidirectional streams into or out of the same serial port. This
bidirectional functionality provides greater flexibility for serial
communications. Further, two SPORTs can be combined to enable
full-duplex, dual-stream communications.
Serial ports can operate at a maximum of one-fourth the peripheral
clock rate of the processor. If channels A and B are active, each
SPORT has a maximum throughput of 2 x
PCLK/4 rate.
• Chained DMA operations for multiple data blocks, see “DMA
Chaining” on page 2-32.
• DMA Chain insertion mode allows the SPORTs to change DMA
priority during chaining, see “Enter DMA Chain Insertion Mode”
on page 10-56.
• Data words between 3 and 32 bits in length, either most significant
bit (MSB) first or least significant bit (LSB) first. Words must be
between 8 and 32 bits in length for I
2
S and left-justified mode.
• 128-channel multichannel is supported in multichannel mode
operation, useful for H.100/H.110 and other telephony interfaces
described in “Multichannel Mode” on page 10-31.
• μ-law and A-law compression/decompression hardware compand-
ing on transmitted and received words when the SPORT operates
in multichannel mode.
Receive comparison and 2-dimensional DMA are not supported.
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