Analog Devices SHARC ADSP-214 Series

Operation Modes
10-22 ADSP-214xx SHARC Processor Hardware Reference
Table 10-6. SPCTLx Control Bit Comparison
Bit Standard Serial
Mode
I
2
S and
Left-justified Mode
Packed Mode Multichannel Mode
Control
0 SPEN_A Reserved
1–2 DTYPE Reserved DTYPE
3 LSBF Reserved LSBF
4–8 SLEN
9 PACK
10 ICLK MSTR ICLK
11 OPMODE
12 CKRE Reserved CKRE
13 FSR Reserved
14 IFS Reserved IMFS
15 DIFS Reserved
16 LFS L_FIRST LMFS
17 LAFS OPMODE Reserved
18 SDEN_A
19 SCHEN_A
20 SDEN_B
21 SCHEN_B
22 FS_BOTH Reserved
23 BHD
24 SPEN_B Reserved
25 SPTRAN
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