ADSP-214xx SHARC Processor Hardware Reference 12-7
Asynchronous Sample Rate Converter
address. This offset value is useful for applications when small changes in
the sample rate ratio between
SRCx_FS_IP and SRCx_FS_OP are expected.
The maximum decimation rate can be calculated from the RAM word
depth is (512 – 64) ÷ 64 taps = 7.
The digital-servo loop is essentially a ramp filter that provides the initial
pointer to the address in RAM and ROM for the start of the FIR convolu-
tion. The RAM pointer is the integer output of the ramp filter while the
ROM pointer is the fractional part. The digital-servo loop must be able to
provide excellent rejection of jitter on the SRCx_FS_IP and SRCx_FS_OP
clocks as well as measure the arrival of the
SRCx_FS_OP clock within 4.97
ps. The digital-servo loop also divides the fractional part of the ramp out-
put by the ratio of (
SRCx_FS_IP)/(SRCx_FS_OP) for the case when
SRCx_FS_IP > SRCx_FS_OP, to dynamically alter the ROM coefficients.
The digital-servo loop is implemented with a multi-rate filter. To settle
the digital-servo loop filter quickly at startup or at a change in the sample
Figure 12-2. Sample Rate Converter Architecture
FIFO
HIGH
ORDER
INTERPOLATION
ROM A
DIGITAL
SERVO LOOP
FIR FILTER
ROM B
ROM C
ROM D
SAMPLE RATE
RATIO
SAMPLE RATE RATIO
EXTERNAL RATIO
(MATCHED PHASE MODE)
RIGHT DATA IN
LEFT DATA IN
SRCx_FS_IP
SRCx_FS_OP
SRCx_DAT_OP
SRCx_FS_IP
COUNTER
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