Programming Models
22-16 ADSP-214xx SHARC Processor Hardware Reference
Listing 22-3. VCO Programming: First Method
ustat2 = dm(PMCTL);
bit clr ustat2 PLLM63|PLLD16; /* Clear the old multiplier
and divider values */
bit set ustat2 DIVEN | PLLD4 |PLLM16; /* set a multiplier of
16 and a divider of 4 */
dm(PMCTL) = ustat2;
bit set ustat2 PLLBP; /* Put PLL in bypass mode. */
bit clr ustat2 DIVEN; /* clear the DIVEN bit */
dm(PMCTL) = ustat2; /* The DIVEN bit should be cleared
while placing the PLL in bypass mode */
waiting_loop:
r0 = 4096; /* wait for PLL to lock at new rate
(requirement for VCO change) */
lcntr = r0, do pllwait until lce;
pllwait: nop;
ustat2 = dm(PMCTL); /* Reading the PMCTL register value
returns the DIVEN bit value as zero */
bit clr ustat2 PLLBP; /* take PLL out of Bypass, PLL is now at
new CCLK) */
dm(PMCTL) = ustat2; /* The DIVEN bit should be cleared while
taking the PLL out of bypass mode */
lcntr = 15, do pllwait1 until lce;
pllwait1: nop;
Listing 22-4. VCO Programming: Second Method
ustat2 = dm(PMCTL);
bit clr ustat2 PLLM63| PLLD16; /* Clear the old multiplier
and divider values */
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