DAI Signal Routing Unit Registers
A-146 ADSP-214xx SHARC Processor Hardware Reference
01000 (0x8) SPORT6_CLK_O Sport 6 Clock Output
01001 (0x9) SPORT7_CLK_O Sport 7 Clock Output
01010 (0xA) SPORT0_FS_O Sport 0 Frame Sync Output
01011 (0xB) SPORT1_FS_O Sport 1 Frame Sync Output
01100 (0xC) SPORT2_FS_O Sport 2 Frame Sync Output
01101 (0xD) SPORT3_FS_O Sport 3 Frame Sync Output
01110 (0xE) SPORT4_FS_O Sport 4 Frame Sync Output
01111 (0xF) SPORT5_FS_O Sport 5 Frame Sync Output
10000 (0x10) SPORT6_FS_O Sport 6 Frame Sync Output
10001 (0x11) SPORT7_FS_O Sport 7 Frame Sync Output
10010 (0x12) SR_SCLK External SR_CLK Pin
10011 (0x13) SR_LAT External SR_LAT Pin
10100 (0x14) PCG_CLKA_O PCG Clock A Output
10101 (0x15) PCG_CLKB_O PCG Clock B Output
10110 (0x16) PCG_FSA_O PCG Frame Sync A Output
10111 (0x17) PCG_FSB_O PCG Frame Sync B Output
11000 (0x18) DAI_P01_O DAI External Pin 1
11001 (0x19) DAI_P02_O DAI External Pin 2
11010 (0x1A) DAI_P03_O DAI External Pin 3
11011 (0x1B) DAI_P04_O DAI External Pin 4
11100 (0x1C) DAI_P05_O DAI External Pin 5
11101 (0x1D) DAI_P06_O DAI External Pin 6
11110 (0x1E) DAI_P07_O DAI External Pin 7
11111 (0x1F) DAI_P08_O DAI External Pin 8
Table A-81. Group G Sources – Shift Register Clock Routing (Cont’d)
Selection Code Source Signal Description (Output Source Selection)
To Next Page
Loading...
Need help?
General
