Analog Devices SHARC ADSP-214 Series - Page 1045

ADSP-214xx SHARC Processor Hardware Reference A-219
Registers Reference
Figure A-118. SRU2_INPUT0 Register (RW)
Figure A-119. SRU2_INPUT1 Register (RW)
SPIB_MISO_I (29–25)
SPI B MISO Input
SPI_CLK_I (19–15) con’t
SPI Clock Input
SPIB_MOSI_I (24–20)
SPI B MOSI Input
SPI_DS_I (14–11)
SPI Device Select Input
SPI_MISO_I (9–5)
SPI MISO Input
SPI_MOSI_I (4–0)
SPI MOSI Input
SPI_CLK_I (19–15)
SPI Clock Input
31 302928 27 26 25 24 23 22 21 20 19 18 17 16
09 837564 2114 12 11 101315
TWI_CLK_I (29–25)
TWI Serial Clock Input
TWI_DATA_I (24–20)
TWI Serial Data Input
UART0_RX_I (14–11)
UART 0 Receiver Input
SPIB_CLK_I (9–5)
SPI B Clock Input
SPIB_DS_I (4–0)
SPIB Device Select Input
31 302928 27 26 25 24 23 22 21 20 19 18 17 16
09 837564 2114 12 11 101315
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