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ADSP-214xx SHARC Processor Hardware Reference 2-41

I/O Processor

63 M PMCTL1,

FIRCTL1,

FIRCTL2,

FIRMACSTAT,

FIRDMASTAT

IIFIR, IMFIR,

ICFIR, IBFIR,

CIFIR, CMFIR,

CLFIR, CPFIR

Accelerator Input

Buffers and FIFO

FIR, IIR, FFT

Accelerator Input

Data

PMCTL1,

IIRCTL1,

IIRCTL2,

IIRMACSTAT,

IIRDMASTAT

IIIIR, IMIIR,

ICIIR, IBIIR,

CIIIR, CMIIR,

CLIIR, CPIIR

PMCTL1

FFTCTL1,

FFTCTL2,

FFTMACSTAT,

FFTDMASTAT

IIFFT, IMFFT,

ICFFT, IBFFT,

CIFFT, CMFFT,

CLFFT, CPIFFT,

64 N PMCTL1,

FIRCTL1,

FIRCTL2,

FIRMACSTAT,

FIRDMASTAT

OIFIR, OMFIR,

OCFIR, OBFIR,

COFIR, CMFIR,

CLFIR, CPFIR

Accelerator Out-

put Buffers and

FIFO

FIR, IIR, FFT

Accelerator Out-

put Data

PMCTL1,

IIRCTL1,

IIRCTL2,

IIRMACSTAT,

IIRDMASTAT

IIIIR, IMIIR,

ICIIR, IBIIR,

CIIIR, CMIIR,

CLIIR, CPIIR

PMCTL1,

FFTCTL1,

FFTCTL2,

FFTMACSTAT,

FFTDMASTAT

OI F F T, O M F FT,

OCFFT, OBFFT,

COFFT, CMFFT,

CLFFT, CPOFFT,

Table 2-28. DMA Channel 0–66 Priorities (Cont’d)

DMA

Channel

Number

Peripheral

Group

Control/Status

Registers

Parameter

Registers

Data Buffer Description

Brand	Analog Devices
Model	SHARC ADSP-214 Series
Category	Computer Hardware
Language	English

Analog Devices SHARC ADSP-214 Series User Manual

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Analog Devices SHARC ADSP-214 Series Specifications

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