Analog Devices SHARC ADSP-214 Series - Page 15

ADSP-214xx SHARC Processor Hardware Reference xv
Contents
Multi-Master Conflicts .......................................................... 4-10
Example Token Passing .......................................................... 4-11
Data Transfer .............................................................................. 4-13
Link Buffers .......................................................................... 4-13
Transmit Buffer ................................................................. 4-14
Receive Buffer ................................................................... 4-14
Buffer Status ..................................................................... 4-15
Core Transfers ....................................................................... 4-15
DMA Transfers ...................................................................... 4-16
Interrupts ................................................................................... 4-16
Interrupt Sources ................................................................... 4-17
Interrupt Service ................................................................... 4-17
Access Completion ............................................................ 4-18
Internal Transfer Completion ............................................ 4-18
DMA Access .......................................................................... 4-19
Chained DMA .................................................................. 4-19
Core Access ........................................................................... 4-19
Service Request Interrupts ..................................................... 4-20
Debug Features ........................................................................... 4-21
Shadow Register .................................................................... 4-21
Buffer Hang Disable (BHD) .................................................. 4-22
Effect Latency ............................................................................. 4-22
Write Effect Latency .............................................................. 4-22
Link Port Effect Latency ........................................................ 4-22
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