Analog Devices SHARC ADSP-214 Series - Page 18

Contents
xviii ADSP-214xx SHARC Processor Hardware Reference
Data Transfer ........................................................................ 6-15
FFT Buffers ...................................................................... 6-15
DMA Transfers ................................................................. 6-15
DMA Channels and TCB Structure .............................. 6-16
Chained DMA .............................................................. 6-16
Interrupts ............................................................................. 6-17
Interrupt Sources ............................................................. 6-18
Servicing DMA Interrupts ................................................ 6-18
Servicing MAC Status Interrupts ....................................... 6-18
FFT Performance .................................................................. 6-19
Small FFT (N is <= 256) ................................................... 6-19
Large FFT (N >= 256) ...................................................... 6-19
Vertical FFT cycles .......................................................... 6-20
Special Prod cycles ............................................................ 6-20
Horizontal FFT cycles ...................................................... 6-20
Debug Features ..................................................................... 6-20
Local Memory Access ....................................................... 6-20
Shadow Register ............................................................... 6-20
Effect Latency ....................................................................... 6-21
Write Effect Latency ......................................................... 6-21
FFT Accelerator Effect Latency ......................................... 6-21
Programming Model ............................................................. 6-21
N <= 256, No Repeat ....................................................... 6-21
N <= 256, Repeat ............................................................. 6-22
www.BDTIC.com/ADI