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Analog Devices SHARC ADSP-214 Series - Page 19

Analog Devices SHARC ADSP-214 Series
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ADSP-214xx SHARC Processor Hardware Reference xix
Contents
N >= 512, No Repeat ........................................................ 6-24
Configure the FFT Control Register .............................. 6-24
Vertical FFT Configuration ........................................... 6-25
Special Buffer Configuration ......................................... 6-25
Horizontal FFT Configuration ...................................... 6-26
N >= 512, Repeat ............................................................. 6-26
Debug Mode ..................................................................... 6-27
Write to Local Memory ................................................. 6-27
Read from Local Memory .............................................. 6-28
FIR Accelerator ........................................................................... 6-28
Features ................................................................................. 6-28
Register Overview ................................................................. 6-29
Clocking ............................................................................... 6-29
Functional Description .......................................................... 6-30
Compute Block ................................................................. 6-31
Partial Sum Register .......................................................... 6-32
Delay Line Memory .......................................................... 6-33
Coefficient Memory .......................................................... 6-33
Prefetch Data Buffer ......................................................... 6-33
Processing Output ............................................................. 6-34
Internal Memory Storage ................................................... 6-35
Coefficients and Input Buffer Storage ............................ 6-35
Operating Modes ................................................................... 6-37
Single Rate Processing ....................................................... 6-37
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