Analog Devices SHARC ADSP-214 Series - Page 20

Contents
xx ADSP-214xx SHARC Processor Hardware Reference
Single Iteration ............................................................. 6-37
Multi-Iteration ............................................................. 6-37
Window Processing ......................................................... 6-38
Multi Rate Processing ...................................................... 6-38
Decimation ...................................................................... 6-38
Interpolation .................................................................... 6-39
Channel Processing ........................................................... 6-40
Floating-Point Data Format .............................................. 6-42
Fixed-Point Data Format .................................................. 6-42
Data Transfer ........................................................................ 6-42
DMA Access ..................................................................... 6-42
Chain Pointer DMA ..................................................... 6-43
Interrupts ............................................................................. 6-44
Interrupt Sources .............................................................. 6-45
Debug Features ..................................................................... 6-45
Local Memory Access ....................................................... 6-45
Single Step Mode .............................................................. 6-46
Emulation Considerations ................................................ 6-46
Effect Latency ....................................................................... 6-46
Write Effect Latency ......................................................... 6-46
FIR Accelerator Effect Latency .......................................... 6-46
FIR Throughput ................................................................... 6-47
Additional Information ..................................................... 6-48
Programming Model ............................................................. 6-48
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