ADSP-214xx SHARC Processor Hardware Reference 3-101
External Port
up DMA transfers, see “General Procedure for Configuring DMA” on
page 2-51. The registers that control external port DMA are described
Table 3-24.
Table 3-24. DMA Parameter Registers
Register Description Comment
IIEPx Internal Index Internal Start Address.
For delay line DMA, it serves as the delay line write
index; for example, the start address of the internal
memory buffer for the external write data.
IMEPx Internal Modifier Internal address modifier.
ICEPx Internal Count For delay line DMA, it serves as count for delay line
writes, write block size.
EIEPx External Index External start address.
EMEPx External Modifier External address modifier.
ECEPx External Count External memory count, read only (alias of ICEPx)
CPEPx Chain Pointer Contains address of the next descriptor in internal
memory.
Table 3-25. Enhanced DMA Parameter Registers
Register Description Comment
ELEPx Circular Buffer Length Hold circular buffer length for circular, delay line DMA,
scatter/gather DMA.
EBEPx External Base Hold circular start address for circular, delay line DMA,
scatter/gather DMA.
RIEPx Read Internal Index Contains start address of internal memory buffer to
which the data read from external memory during delay
line DMA reads are to be written into (alias of IIEPx
during delay line DMA).
RCEPx Read Count Contains number of reads from each taplist, read block
size (alias of ICEPx during delay line DMA).
RMEPx Read External Modifier Contains external modifier to be used for delay line reads
(alias of EMEPx during delay line DMA).
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