Analog Devices SHARC ADSP-214 Series - Page 25

ADSP-214xx SHARC Processor Hardware Reference xxv
Contents
I/O Interrupt Mode ............................................................... 8-16
DMA Modes ......................................................................... 8-17
DIGITAL APPLICATION/DIGITAL PERIPHERAL
INTERFACES
Features ........................................................................................ 9-2
Register Overview ......................................................................... 9-3
Clocking ....................................................................................... 9-4
Functional Description ................................................................. 9-4
DAI/DPI Signal Naming Conventions .................................... 9-7
I/O Pin Buffers ....................................................................... 9-7
Pin Buffers as Signal Output ............................................... 9-8
Pin Buffers as Signal Input ................................................ 9-10
Pin Buffers as Open Drain ................................................ 9-11
DAI/DPI Pin Buffer Status ................................................ 9-11
Unused DAI/DPI Pins ...................................................... 9-12
Miscellaneous Buffers ............................................................ 9-12
DAI/DPI Peripherals ............................................................. 9-14
Output Signals With Pin Buffer Enable Control ................ 9-14
Output Signals Without Pin Buffer Enable Control ........... 9-16
Signal Routing Units (SRUs) ................................................. 9-16
Signal Routing Matrix by Groups ...................................... 9-16
DAI/DPI Group Routing .................................................. 9-18
Rules for SRU Connections ............................................... 9-20
Making SRU Connections ................................................. 9-20
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