ADSP-214xx SHARC Processor Hardware Reference A-107
Registers Reference
29–28 CTYPE Channel x Type Select.
00 = Synchronous (default)
01 = Reserved
10 = Asynchronous
11 = Control
30 CTRAN Channel x Transmit Select.
0 = Receive (default)
1 = Transmit
31 CE Channel x Enable.
0 = Channel x disabled (default)
1 = Enabled
Table A-67. MLB_CECRx Register Bit Descriptions for Synchronous
Channels (RW)
Bit Name Description
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