Contents
x ADSP-214xx SHARC Processor Hardware Reference
Load Extended Mode Register 3 ................................... 3-53
Bank Activation ............................................................ 3-53
Precharge ...................................................................... 3-54
Precharge All ................................................................ 3-54
Burst Read .................................................................... 3-54
Burst Write ................................................................... 3-55
Auto-Refresh ................................................................ 3-56
Self-Refresh Entry ......................................................... 3-57
Self-Refresh Exit ........................................................... 3-57
Precharge Power-Down Entry ....................................... 3-58
Precharge Power-down Exit ........................................... 3-59
No Operation/Command Inhibit .................................. 3-60
Address Mapping .............................................................. 3-60
Address Translation Options ......................................... 3-60
Page Interleaving Map .................................................. 3-60
Bank Interleaving Map .................................................. 3-61
Address Width Settings ................................................. 3-61
16-Bit Address Mapping ............................................... 3-62
Address Map Tables ...................................................... 3-63
Refresh Rate ..................................................................... 3-66
Data Mask ........................................................................ 3-68
Resetting the Controller .................................................... 3-68
Disabling the Controller ................................................... 3-69
Initialization Sequence .......................................................... 3-69
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