Contents
xii ADSP-214xx SHARC Processor Hardware Reference
Conditional Instructions ................................................... 3-86
SIMD Access ........................................................................ 3-86
SDRAM ........................................................................... 3-86
DDR2 .............................................................................. 3-87
External Instruction Fetch ................................................ 3-88
Interrupt Vector Table (IVT) ........................................ 3-88
Fetching ISA Instructions From External Memory ......... 3-89
Instruction Packing ....................................................... 3-90
16-Bit Instruction Storage and Packing ......................... 3-90
8-Bit Instruction Storage and Packing ........................... 3-92
Mixing Instructions and Data in External Bank 0 .......... 3-93
Addressing for Various Memory Sizes ............................ 3-93
Writing Instructions to External Memory ...................... 3-94
Instruction Cache ......................................................... 3-95
Fetching VISA Instructions From External Memory .......... 3-98
External Port DMA .................................................................. 3-100
External Port DMA Parameter Registers .............................. 3-100
Operating Modes ................................................................ 3-102
Internal DMA Addressing ............................................... 3-102
Standard DMA ............................................................... 3-103
Circular Buffered DMA .................................................. 3-103
Chained DMA Mode .......................................................... 3-104
Changing DMA Direction on the Fly .............................. 3-104
Scatter/Gather DMA ........................................................... 3-106
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