Analog Devices SHARC ADSP-214 Series - Page 13

ADSP-214xx SHARC Processor Hardware Reference xiii
Contents
External Address Calculation ........................................... 3-106
Delay Line DMA ................................................................. 3-111
External Address Calculation for Reads ............................ 3-112
Interrupts ................................................................................ 3-114
Access Completion .......................................................... 3-115
Internal Transfer Completion .......................................... 3-115
Interrupt Dependency on DMA Mode ............................ 3-115
External Port Throughput ......................................................... 3-116
AMI Data Throughput ........................................................ 3-117
SDRAM Throughput .......................................................... 3-117
Throughput Conditional Instructions .............................. 3-117
DDR2 Throughput ............................................................. 3-118
DMA Throughput .......................................................... 3-118
Core Throughput ............................................................ 3-118
External Instruction Fetch Throughput ................................ 3-119
Effect Latency ........................................................................... 3-120
Write Effect Latency ............................................................ 3-121
Programming Models ................................................................ 3-121
External Port ....................................................................... 3-121
DMA .................................................................................. 3-121
Standard DMA .............................................................. 3-121
Chained DMA ................................................................ 3-122
Delay Line DMA ............................................................ 3-123
Disabling and Re-enabling DMA ..................................... 3-124
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