ADSP-214xx SHARC Processor Hardware Reference A-135
Registers Reference
0001101 (0xD) DAI_PB14_O Pin Buffer 14
0001110 (0xE) DAI_PB15_O Pin Buffer 15
0001111 (0xF) DAI_PB16_O Pin Buffer 16
0010000 (0x10) DAI_PB17_O Pin Buffer 17
0010001 (0x11) DAI_PB18_O Pin Buffer 18
0010010 (0x12) DAI_PB19_O Pin Buffer 19
0010011 (0x13) DAI_PB20_O Pin Buffer 20
0010100 (0x14) SPORT0_DA_O SPORT 0A Data
0010101 (0x15) SPORT0_DB_O SPORT 0B Data
0010110 (0x16) SPORT1_DA_O SPORT 1A Data
0010111 (0x17) SPORT1_DB_O SPORT 1B Data
0011000 (0x18) SPORT2_DA_O SPORT 2A Data
0011001 (0x19) SPORT2_DB_O SPORT 2B Data
0011010 (0x1A) SPORT3_DA_O SPORT 3A Data
0011011 (0x1B) SPORT3_DB_O SPORT 3B Data
0011100 (0x1C) SPORT4_DA_O SPORT 4A Data
0011101 (0x1D) SPORT4_DB_O SPORT 4B Data
0011110 (0x1E) SPORT5_DA_O SPORT 5A Data
0011111 (0x1F) SPORT5_DB_O SPORT 5B Data
0100000 (0x20) SPORT0_CLK_O SPORT 0 Clock
0100001 (0x21) SPORT1_CLK_O SPORT 1 Clock
0100010 (0x22) SPORT2_CLK_O SPORT 2 Clock
0100011 (0x23) SPORT3_CLK_O SPORT 3 Clock
0100100 (0x24) SPORT4_CLK_O SPORT 4 Clock
0100101 (0x25) SPORT5_CLK_O SPORT 5 Clock
0100110 (0x26) SPORT0_FS_O SPORT 0 Frame Sync
Table A-78. Group D Sources – Pin Signal Assignments (Cont’d)
Selection Code Source Signal Description (Source Selection)
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