ADSP-214xx SHARC Processor Hardware Reference I-27
Index
SPORTs (continued)
chained DMA, 2-14
chain insertion (DMA), 2-36
chain insertion mode (DMA), 10-48
channel number (quantity) select (NCH
bit), 10-35
clock divisor equation, 10-9
clock frequency equation, 10-9
clock (SCLKx) pins, 10-11
clock signal options, 10-8
companding and data type bit (DTYPE),
10-14
companding (compressing/expanding),
10-3
configuring frame sync signals, 10-11
configuring standard DSP serial mode,
10-25
control bit comparison, 10-22
data type, sign-extend, 10-12
data type, zero-fill, 10-12
data type bit (DTYPE), 10-22
debugging, A-170
divisor (DIVx) register, 10-8, 10-18,
10-26, 10-29
DMA chaining, 10-47
DMA channels, 10-45
duplex, full, 10-11
enabling B channels, A-171
equation
frame sync frequency, 10-9
examples, normal vs. alternate framing,
10-28
features, 10-2
finding currently selected channel, A-171
flag pins, 10-12
FLAGx pins, 10-12
framed and unframed data, 10-26
framed vs. unframed data example,
10-28
frame sync and serial word length, 10-10
SPORTs (continued)
frame sync delay, 10-33
full-duplex operation, 10-11
input/output (FLAGx) pins, 10-12
internal clock selection, 10-8
interrupts, 10-46, 10-49, 10-50
I/O processor bus and, 10-47
latency in writes, 10-55
left-justified mode control bits, 10-29
loopback mode, 10-54
masking interrupts, 10-50
master mode enable, 10-30
operation modes, changing,
10-21
operation modes, listed, 10-
21
operation modes, standard DSP serial,
10-25, C-2
packing enable (PACK) bit, 10-22,
10-45, 10-50
pairing, 10-32, 10-34
receive buffers, 10-41
serial clock pins, 10-11
serial word length and frame sync, 10-10
setting frame sync rates, 10-29
signal sensitivity, 10-6
SPORTx_DA and SPORTx_DB
channel data signal, 10-11
SPORTx_FS (serial port frame sync)
pins, 10-11
transmit buffers, 10-40
transmit underflow status (TUVF_A)
bit, A-158, A-161
transmit valid data signal
(SPORTx_TDV_0), 10-33
Tx/Rx on FS rising edge, 10-24
using with SRU, 10-5
warnings and cautions, 10-42
word length, 10-10
SPTRAN (serial port data direction
control) bit, A-157, A-160, A-165
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