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Analog Devices SHARC ADSP-214 Series - Page 1167

Analog Devices SHARC ADSP-214 Series
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ADSP-214xx SHARC Processor Hardware Reference I-9
Index
extended parameter registers, DMA, 2-8
external event watchdog (EXT_CLK)
mode, 16-2, 16-15
external memory
access restrictions, 3-132
access timing, 3-5
address bank decoding, 3-27, 3-62
addressing, AMI, 3-14, 3-15
banks, 3-17, 3-35
boot-up code for interrupt vector tables,
3-89
executing instructions from, 3-89
external physical address, 3-14
interface, 3-10
most significant word first (MSWF) bit,
A-22, A-49
packing and unpacking data (PKDIS)
bits, A-22, A-49
pin descriptions, 3-48
reads, 3-84
restrictions, access, 3-132
SDRAM, 3-35
select signals (MSx), 3-35
SPORT data transfers, 10-39
writes, 3-84
external port
bus, 2-43
bus hold cycle bit, A-22, A-49
bus idle cycle bit, A-23, A-50
bus priority, A-20, A-46
channel freezing, 3-10
channel priority, 2-43, A-20, A-46
core address mapping, 3-27
data pin mode select (EPDATA) bits,
A-6
DMA bus, 2-43
DMA read optimization, 3-43, 3-78
DMA registers, 2-28, A-60 to A-63
external code throughput, 3-119
external index addressing, 2-28
external port (continued)
feature summary,
4-2
in
struction packing, 3-90
program controlled interrupt bit (PCI),
6-18
read hold cycle (RHC) bits, A-23, A-50
TCB, 2-19
transfer direction, DMA, 2-24
external port bits
bank select (BxSD), A-19, A-46
bus priority (EPBR), A-20, A-46
data enable (DATA), A-47
delay line write pointer write back status
(WBS), A-62
DMA chaining enable (CHEN), A-61
DMA chain status (CHS), A-62
DMA circular buffer enable (CBEN),
A-61
DMA delay-line enable (DLEN), A-61
DMA direction (TRAN), A-61
DMA enable (DMAEN), A-61
DMA external interface status (EXTS),
A-62
DMA FIFO status (DFS), A-62
DMA flush FIFO (DFLSH), A-61
DMA transfer direction status (DIRS),
A-62, A-63
DMA transfer status (DMAS), A-62
freeze length core (FRZCR), A-20, A-21,
A-47
freeze length (FRZDMA), A-20, A-46
freeze (NOFRZDMA, NOFRZCR),
3-10
internal DMA complete interrupt
(INIRT), A-62
on the fly control loading enable
(OFCEN), A-61
tap list DMA enable (TLEN), A-62
write back of EPEI after reads/writes
(WRBEN), A-61
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