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18.1.1 MMCHS Features ............................................................................................ 3345
18.1.2 Unsupported MMCHS Features ............................................................................ 3345
18.2 Integration ............................................................................................................... 3346
18.2.1 MMCHS Connectivity Attributes ............................................................................ 3347
18.2.2 MMCHS Clock and Reset Management .................................................................. 3348
18.2.3 MMCHS Pin List .............................................................................................. 3348
18.3 Functional Description ................................................................................................. 3350
18.3.1 MMC/SD/SDIO Functional Modes ......................................................................... 3350
18.3.2 Resets ......................................................................................................... 3357
18.3.3 Power Management .......................................................................................... 3358
18.3.4 Interrupt Requests ............................................................................................ 3361
18.3.5 DMA Modes ................................................................................................... 3363
18.3.6 Mode Selection ............................................................................................... 3366
18.3.7 Buffer Management .......................................................................................... 3366
18.3.8 Transfer Process ............................................................................................. 3369
18.3.9 Transfer or Command Status and Error Reporting ...................................................... 3370
18.3.10 Auto Command 12 Timings ................................................................................ 3375
18.3.11 Transfer Stop ................................................................................................ 3377
18.3.12 Output Signals Generation ................................................................................ 3378
18.3.13 Card Boot Mode Management ............................................................................ 3380
18.3.14 CE-ATA Command Completion Disable Management ................................................ 3382
18.3.15 Test Registers ............................................................................................... 3382
18.3.16 MMC/SD/SDIO Hardware Status Features .............................................................. 3383
18.4 Low-Level Programming Models ..................................................................................... 3384
18.4.1 Surrounding Modules Global Initialization ................................................................. 3384
18.4.2 MMC/SD/SDIO Controller Initialization Flow .............................................................. 3384
18.4.3 Operational Modes Configuration .......................................................................... 3387
18.5 Multimedia Card Registers ............................................................................................ 3389
18.5.1 MULTIMEDIA_CARD Registers ............................................................................ 3389
19 Universal Asynchronous Receiver/Transmitter (UART) ....................................................... 3446
19.1 Introduction .............................................................................................................. 3447
19.1.1 UART Mode Features ........................................................................................ 3447
19.1.2 IrDA Mode Features ......................................................................................... 3447
19.1.3 CIR Mode Features .......................................................................................... 3447
19.1.4 Unsupported UART Features ............................................................................... 3447
19.2 Integration ............................................................................................................... 3449
19.2.1 UART Connectivity Attributes ............................................................................... 3449
19.2.2 UART Clock and Reset Management ..................................................................... 3450
19.2.3 UART Pin List ................................................................................................. 3452
19.3 Functional Description ................................................................................................. 3453
19.3.1 Block Diagram ................................................................................................ 3453
19.3.2 Clock Configuration .......................................................................................... 3454
19.3.3 Software Reset ............................................................................................... 3454
19.3.4 Power Management .......................................................................................... 3454
19.3.5 Interrupt Requests ............................................................................................ 3456
19.3.6 FIFO Management ........................................................................................... 3459
19.3.7 Mode Selection ............................................................................................... 3467
19.3.8 Protocol Formatting .......................................................................................... 3473
19.4 UART/IrDA/CIR Basic Programming Model ......................................................................... 3496
19.4.1 UART Programming Model ................................................................................. 3496
19.4.2 IrDA Programming Model ................................................................................... 3502
19.5 UART Registers ........................................................................................................ 3505
19.5.1 UART Registers .............................................................................................. 3505
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Contents SPRUH73H–October 2011–Revised April 2013
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