Texas Instruments AM335 Series Technical Reference Manual

www.ti.com EDMA3 Registers
11.4.1.6.8 Secondary Event Registers (SER, SERH)
The secondary event registers (SER/SERH) provide information on the state of a DMA channel or event
(0 through 63). If the EDMA3CC receives a TR synchronization due to a manual-trigger, event-trigger, or
chained-trigger source (ESR.En/ESRH.En = 1, ER.En/ERH.En = 1, or CER.En/CERH.En = 1), which
results in the setting of a corresponding event bit in SER/SERH (SER.En/SERH.En = 1), it implies that the
corresponding DMA event is in the queue.
Once a bit corresponding to an event is set in SER/SERH, the EDMA3CC does not prioritize additional
events on the same DMA channel. Depending on the condition that lead to the setting of the SER bits,
either the EDMA3CC hardware or the software (using SECR/SECRH) needs to clear the SER/SERH bits
for the EDMA3CC to evaluate subsequent events (subsequent transfers) on the same channel. For
additional conditions that can cause the secondary event registers to be set, see EDMA Overview.
The SER is shown in Figure 11-84 and described in Table 11-68. The SERH is shown in Figure 11-85 and
described in Table 11-69.
Figure 11-84. Secondary Event Register (SER)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
E31 E30 E29 E28 E27 E26 E25 E24 E23 E22 E21 E20 E19 E18 E17 E16
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
E15 E14 E13 E12 E11 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 E0
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
LEGEND: R = Read only; -n = value after reset
Table 11-68. Secondary Event Register (SER) Field Descriptions
Bit Field Value Description
31-0 En Secondary event register. The secondary event register is used along with the event register (ER) to
provide information on the state of an event.
0 Event is not currently stored in the event queue.
1 Event is currently stored in the event queue. Event arbiter will not prioritize additional events.
Figure 11-85. Secondary Event Register High (SERH)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
E63 E62 E61 E60 E59 E58 E57 E56 E55 E54 E53 E52 E51 E50 E49 E48
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
E47 E46 E45 E44 E43 E42 E41 E40 E39 E38 E37 E36 E35 E34 E33 E32
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
LEGEND: R = Read only; -n = value after reset
Table 11-69. Secondary Event Register High (SERH) Field Descriptions
Bit Field Value Description
31-0 En Secondary event register. The secondary event register is used along with the event register high (ERH)
to provide information on the state of an event.
0 Event is not currently stored in the event queue.
1 Event is currently stored in the event queue. Event submission/prioritization logic will not prioritize
additional events.
979
SPRUH73H–October 2011–Revised April 2013 Enhanced Direct Memory Access (EDMA)
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Texas Instruments AM335 Series Specifications

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Brand	Texas Instruments
Model	AM335 Series
Category	Computer Hardware
Language	English