Texas Instruments AM335 Series Technical Reference Manual

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8.1.13.3.4 RM_WKUP_RSTST Register (offset = Ch) [reset = 0h]
RM_WKUP_RSTST is shown in Figure 8-175 and described in Table 8-192.
This register logs the different reset sources of the ALWON domain. Each bit is set upon release of the
domain reset signal. Must be cleared by software. [warm reset insensitive]
Figure 8-175. RM_WKUP_RSTST Register
31 30 29 28 27 26 25 24
Reserved
R-0h
23 22 21 20 19 18 17 16
Reserved
R-0h
15 14 13 12 11 10 9 8
Reserved
R-0h
7 6 5 4 3 2 1 0
ICECRUSHER_M3_R EMULATION_M3_RS WKUP_M3_LRST Reserved
ST T
R/W-0h R/W-0h R/W-0h R-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 8-192. RM_WKUP_RSTST Register Field Descriptions
Bit Field Type Reset Description
31-8 Reserved R 0h
7 ICECRUSHER_M3_RST R/W 0h
M3 Processor has been reset due to M3 ICECRUSHER1 reset event
0x0 = RESET_NO : No reset
0x1 = RESET_YES : M3 Processor has been reset
6 EMULATION_M3_RST R/W 0h M3 Processor has been reset due to emulation reset source e.g.
assert reset command initiated by the icepick module
0x0 = RESET_NO : No reset
0x1 = RESET_YES : M3 Processor has been reset
5 WKUP_M3_LRST R/W 0h
M3 Processor has been reset
0x0 = RESET_NO : No reset
0x1 = RESET_YES : M3 Processor has been reset
4-0 Reserved R 0h
8.1.13.4 PRM_MPU Registers
Table 8-193 lists the memory-mapped registers for the PRM_MPU. All register offset addresses not listed
in Table 8-193 should be considered as reserved locations and the register contents should not be
modified.
Table 8-193. PRM_MPU REGISTERS
Offset Acronym Register Name Section
0h PM_MPU_PWRSTCTRL This register controls the MPU power state to reach Section 8.1.13.4.1
upon mpu domain sleep transition
4h PM_MPU_PWRSTST This register provides a status on the current MPU Section 8.1.13.4.2
power domain state0.
[warm reset insensitive]
8h RM_MPU_RSTST This register logs the different reset sources of the Section 8.1.13.4.3
ALWON domain.
Each bit is set upon release of the domain reset signal.
Must be cleared by software.
[warm reset insensitive]
719
SPRUH73H–October 2011–Revised April 2013 Power, Reset, and Clock Management (PRCM)
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Texas Instruments AM335 Series Specifications

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Brand	Texas Instruments
Model	AM335 Series
Category	Computer Hardware
Language	English