Functional Description
www.ti.com
Moreover, two partial software reset bits are provided:
• SD_SYSCTL[26] SRD bit
• SD_SYSCTL[25] SRC bit
These two reset bits are useful to reinitialize data or command processes respectively in case of line
conflict. When set to 1, a reset process is automatically released when the reset completes:
• The SD_SYSCTL[26] SRD bit resets all finite state-machines and status management that handle data
transfers on both the interface and functional side.
• The SD_SYSCTL[25] SRC bit resets all finite state-machines and status management that handle
command transfers on both the interface and functional side.
NOTE: If any of the clock inputs are not present for the MMC/SD/SDIO peripheral, the software
reset will not complete.
18.3.3 Power Management
The MMC/SD/SDIO host controller can enter into different modes and save power:
• Normal mode
• Idle mode
The two modes are mutually exclusive (the module can be in normal mode or in idle mode). The
MMC/SD/SDIO host controller is compliant with the PRCM module handshake protocol. When the
MMC/SD/SDIO power domain is off, the only way to wake up the power domain and different
MMC/SD/SDIO clocks is to monitor the mmc_dat1 input pin state via a different GPIO line for each
MMC/SD/SDIO interface.
18.3.3.1 Normal Mode
The autogating of interface and functional clocks occurs when the following conditions are met:
• The SD_SYSCONFIG[0] AUTOIDLE bit is set to 1.
• There is no transaction on the MMC interface.
The autogating of interface and functional clocks stops when the following conditions are met:
• A register access occurs through the L3 (or L4) interconnect.
• A wake-up event occurs (an interrupt from a SDIO card).
• A transaction on the MMC/SD/SDIO interface starts.
Then the MMC/SD/SDIO host controller enters in low-power state even if SD_SYSCONFIG[0] AUTOIDLE
is cleared to 0. The functional clock is internally switched off and only interconnect read and write
accesses are allowed.
18.3.3.2 Idle Mode
The clocks provided to MMC/SD/SDIO are switched off upon a PRCM module request. They are switched
back upon module request. The MMC/SD/SDIO host controller complies with the PRCM module
handshaking protocol:
• Idle request from the system power manager
• Idle acknowledgment from the MMC/SD/SDIO host controller
The idle acknowledgment varies according to the SD_SYSCONFIG[4:3] SIDLEMODE bit field:
• 0: Force-idle mode. The MMC/SD/SDIO host controller acknowledges the system power manager
request unconditionally.
• 1h: No-idle mode. The MMC/SD/SDIO host controller ignores the system power manager request and
behaves normally as if the request was not asserted.
• 2h: Smart-idle mode. The MMC/SD/SDIO host controller acknowledges the system power manager
request according to its internal state.
3358
Multimedia Card (MMC) SPRUH73H–October 2011–Revised April 2013
Submit Documentation Feedback
Copyright © 2011–2013, Texas Instruments Incorporated
To Next Page
Loading...
Need help?
General
