Functional Description
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By default, all channels map to PaRAM set to 0. These should be remapped before use. For more
information, see Section 11.4.1.1.4 (DCHMAP registers) and Section 11.4.1.1.5 (QCHMAP registers).
Table 11-5. EDMA3 Parameter RAM Contents
PaRAM Set Number Address Parameters
0 EDMA Base Address + 4000h to EDMA Base PaRAM set 0
Address + 401Fh
1 EDMA Base Address + 4020h to EDMA Base PaRAM set 1
Address + 403Fh
2 EDMA Base Address + 4040h to EDMA Base PaRAM set 2
Address + 405Fh
3 EDMA Base Address + 4060h to EDMA Base PaRAM set 3
Address + 407Fh
4 EDMA Base Address + 4080h to EDMA Base PaRAM set 4
Address + 409Fh
5 EDMA Base Address + 40A0h to EDMA Base PaRAM set 5
Address + 40BFh
6 EDMA Base Address + 40C0h to EDMA Base PaRAM set 6
Address + 40DFh
7 EDMA Base Address + 40E0h to EDMA Base PaRAM set 7
Address + 40FFh
8 EDMA Base Address + 4100h to EDMA Base PaRAM set 8
Address + 411Fh
9 EDMA Base Address + 4120h to EDMA Base PaRAM set 9
Address + 413Fh
... ... ...
63 EDMA Base Address + 47E0h to EDMA Base PaRAM set 63
Address + 47FFh
64 EDMA Base Address + 4800h to EDMA Base PaRAM set 64
Address + 481Fh
65 EDMA Base Address + 4820h to EDMA Base PaRAM set 65
Address + 483Fh
... ... ...
254 EDMA Base Address + 5FC0h to EDMA Base PaRAM set 254
Address + 5FDFh
255 EDMA Base Address + 5FE0h to EDMA Base PaRAM set 255
Address + 5FFFh
11.3.3.1 PaRAM
Each parameter set of PaRAM is organized into eight 32-bit words or 32 bytes, as shown in Figure 11-9
and described in Table 11-6. Each PaRAM set consists of 16-bit and 32-bit parameters.
882
Enhanced Direct Memory Access (EDMA) SPRUH73H–October 2011–Revised April 2013
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