McSPI Registers
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24.4.1.11 McSPI Channel (i) Transmit Register (MCSPI_TX(i))
The McSPI channel i transmit register (MCSPI_TX(i)) contains a single McSPI word to transmit on the
serial link. The (MCSPI_TX(i)) is shown in Figure 24-36 and described in Table 24-22.
• Little endian host access SPI 8 bit word on 0; big endian host accesses on 3h.
• The SPI words are transferred with MSB first.
Figure 24-36. McSPI Channel (i) Transmit Register (MCSPI_TX(i))
31 0
TDATA
R/W-0
LEGEND: R/W = Read/Write; -n = value after reset
Table 24-22. McSPI Channel (i) Transmit Register (MCSPI_TX(i)) Field Descriptions
Bit Field Value Description
31-0 TDATA 0-FFFF FFFFh Channel i data to transmit.
24.4.1.12 McSPI Channel (i) Receive Register (MCSPI_RX(i))
The McSPI channel i FIFO receive buffer register (MCSPI_RX(i)) contains a single McSPI word received
through the serial link. The (MCSPI_RX(i)) is shown in Figure 24-37 and described in Table 24-23.
• Little endian host access SPI 8 bit word on 0; big endian host accesses on 3h.
Figure 24-37. McSPI Channel (i) Receive Register (MCSPI_RX(i))
31 0
RDATA
R-0
LEGEND: R = Read only; -n = value after reset
Table 24-23. McSPI Channel (i) Receive Register (MCSPI_RX(i)) Field Descriptions
Bit Field Value Description
31-0 RDATA 0-FFFF FFFFh Channel i received data.
4052
Multichannel Serial Port Interface (McSPI) SPRUH73H–October 2011–Revised April 2013
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