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EDMA3 Registers
11.4.1.5 Memory Protection Address Space
11.4.1.5.1 Memory Protection Fault Address Register (MPFAR)
The memory protection fault address register (MPFAR) is shown in Figure 11-66 and described in
Table 11-50. A CPU write of 1 to the MPFCLR bit in the memory protection fault command register
(MPFCR) causes any error conditions stored in MPFAR to be cleared.
Figure 11-66. Memory Protection Fault Address Register (MPFAR)
31 16
FADDR
R-0
15 0
FADDR
R-0
LEGEND: R = Read only; -n = value after reset
Table 11-50. Memory Protection Fault Address Register (MPFAR) Field Descriptions
Bit Field Value Description
31-0 FADDR 0-FFFF FFFFh Fault address. This 32-bit read-only status register contains the fault address when a memory
protection violation is detected. This register can only be cleared via the memory protection fault
command register (MPFCR).
965
SPRUH73H–October 2011–Revised April 2013 Enhanced Direct Memory Access (EDMA)
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