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USB Registers
16.5.3.4 USB1IRQMSTAT Register (offset = 20h) [reset = 0h]
USB1IRQMSTAT is shown in Figure 16-102 and described in Table 16-112.
Figure 16-102. USB1IRQMSTAT Register
31 30 29 28 27 26 25 24
Reserved
23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8
Reserved
7 6 5 4 3 2 1 0
Reserved BANK1 BANK0
R-0h R-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 16-112. USB1IRQMSTAT Register Field Descriptions
Bit Field Type Reset Description
1 BANK1 R 0h 0: No events pending from IRQ_STATUS_1
1: At least one event is pending from IRQ_STATUS_1
0 BANK0 R 0h 0: No events pending from IRQ_STATUS_0
1: At least one event is pending from IRQ_STATUS_0 USB1
IRQ_MERGED_STATUS Register
1859
SPRUH73H–October 2011–Revised April 2013 Universal Serial Bus (USB)
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