Texas Instruments AM335 Series Technical Reference Manual

Portion A
Portion B
MEM_SIZE/8
Interconnect clock domain Interface (card) clock domain
3’
3
4’
4
Read from
SD_DATA
Read from card
4
occurs only after
3
4
When is completed,
4’
occurs only after
3’
Portion A
Portion B
MEM_SIZE/8
Read from
SD_DATA
Read from card
are two different transfers that occur at the same time.and
Read
to
the card
SD_CMD[DDIR]=1
Interconnect bus
Interconnect bus
32 bits
32 bits
32 bits
32 bits
Card bus
Card bus
Functional Description www.ti.com
Figure 18-20. Buffer Management for a Read
18.3.7.1.1 Memory Size, Block Length, and Buffer Management Relationship
The maximum block length and buffer management that can be targeted by system depend on memory
depth setting.
Table 18-12. Memory Size, BLEN, and Buffer Relationship
Memory Size([5:2] MEMSIZE in bytes) 512 1024 2048 4096
Maximum block length supported 512 1024 2048 2048
Double-buffering for maximum block N/A BLEN <= 512 BLEN <= 1024 BLEN <= 2048
length
Single-buffering for block length BLEN<=512 512 < BLEN <= 1024 < BLEN <= N/A
1024 2048
3368
Multimedia Card (MMC) SPRUH73H–October 2011–Revised April 2013
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Texas Instruments AM335 Series Specifications

General

Brand	Texas Instruments
Model	AM335 Series
Category	Computer Hardware
Language	English