www.ti.com
RTC_SS
20.3.5.35 RTC_DEBOUNCE Register (offset = 9Ch) [reset = 0h]
RTC_DEBOUNCE is shown in Figure 20-95 and described in Table 20-98.
The debounce timer uses the 32768-Hz clock. It allows choosing the timing or the accuracy of
debouncing . A register receives a bit from the reference pin. You will choose the timing if you use the
debouncing like a timer, or you will choose the accuracy if you use the debouncing like a real debouncing.
The debouncing will be finished when the reference pin will stay the same value (defined in
DEBOUNCE_REG) for a defined time.
Figure 20-95. RTC_DEBOUNCE Register
31 30 29 28 27 26 25 24
Reserved
R-0h
23 22 21 20 19 18 17 16
Reserved
R-0h
15 14 13 12 11 10 9 8
Reserved
R-0h
7 6 5 4 3 2 1 0
DEBOUNCE_REG
R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 20-98. RTC_DEBOUNCE Register Field Descriptions
Bit Field Type Reset Description
31-8 Reserved R 0h
7-0 DEBOUNCE_REG R/W 0h Debounce time.
A value, n, other than 0 results in a debounce time of 30.52 s*(n+1).
0x0 = Debounce time is 30.52 s.
3669
SPRUH73H–October 2011–Revised April 2013 Timers
Submit Documentation Feedback
Copyright © 2011–2013, Texas Instruments Incorporated