Functional Description
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26.1.8.4.4 Pins Used
The list of device pins that are configured by the ROM in the case of EMAC boot mode are as follows.
Please note that all the pins might not be driven at boot time.
Table 26-32. Pins Used for EMAC Boot in MII Mode
Signal Name Pin Used in Device Pin Mux Mode
gmii1_col MII1_COL 0
gmii1_crs MII1_CRS 0
gmii1_rxer MII1_RX_ER 0
gmii1_txen MII1_TX_EN 0
gmii1_rxdv MII1_RX_DV 0
gmii1_txd[3:0] MII1_TXD[3:0] 0
gmii1_txclk MII1_TX_CLK 0
gmii1_rxclk MII1_RX_CLK 0
gmii1_rxd[3:0] MII1_RXD[3:0] 0
mdio_data MDIO 0
mdio_clk MDC 0
Table 26-33. Pins Used for EMAC Boot in RGMII Mode
Signal Name Pin Used in Device Pin Mux Mode
rgmii1_tctl MII1_TX_EN 2
rgmii1_rctl MII1_RX_DV 2
rgmii1_td[3:0] MII1_TXD[3:0] 2
rgmii1_tclk MII1_TX_CLK 2
rgmii1_rclk MII1_RX_CLK 2
rgmii1_rd[3:0] MII1_RXD[3:0] 2
mdio_data MDIO 0
mdio_clk MDC 0
Table 26-34. Pins Used for EMAC Boot in RMII Mode
Signal Name Pin Used in Device Pin Mux Mode
rmii1_crs_dv MII1_CRS 1
rmii1_rxer MII1_RX_ER 1
rmii1_txen MII1_TX_EN 1
rmii1_txd[1:0] MII1_TXD[1:0] 1
rmii1_rxd[1:0] MII1_RXD[1:0] 1
RMII1_REF_CLK (Driven by External 50-MHz
rmii1_refclk 0
Source)
mdio_data MDIO 0
mdio_clk MDC 0
4146
Initialization SPRUH73H–October 2011–Revised April 2013
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