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Ethernet Subsystem Registers
14.5.6.11 P0_RX_DSCP_PRI_MAP2 Register (offset = 38h) [reset = 0h]
P0_RX_DSCP_PRI_MAP2 is shown in Figure 14-131 and described in Table 14-146.
CPSW PORT 0 RX DSCP PRIORITY TO RX PACKET MAPPING REG 2
Figure 14-131. P0_RX_DSCP_PRI_MAP2 Register
31 30 29 28 27 26 25 24
Reserved PRI23 Reserved PRI22
R/W-0h R/W-0h
23 22 21 20 19 18 17 16
Reserved PRI21 Reserved PRI20
R/W-0h R/W-0h
15 14 13 12 11 10 9 8
Reserved PRI19 Reserved PRI18
R/W-0h R/W-0h
7 6 5 4 3 2 1 0
Reserved PRI17 Reserved PRI16
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 14-146. P0_RX_DSCP_PRI_MAP2 Register Field Descriptions
Bit Field Type Reset Description
30-28 PRI23 R/W 0h Priority
23 - A packet TOS of 0d23 is mapped to this received packet
priority.
26-24 PRI22 R/W 0h Priority
22 - A packet TOS of 0d22 is mapped to this received packet
priority.
22-20 PRI21 R/W 0h Priority
21 - A packet TOS of 0d21 is mapped to this received packet
priority.
18-16 PRI20 R/W 0h Priority
20 - A packet TOS of 0d20 is mapped to this received packet
priority.
14-12 PRI19 R/W 0h Priority
19 - A packet TOS of 0d19 is mapped to this received packet
priority.
10-8 PRI18 R/W 0h Priority
18 - A packet TOS of 0d18 is mapped to this received packet
priority.
6-4 PRI17 R/W 0h Priority
17 - A packet TOS of 0d17 is mapped to this received packet
priority.
2-0 PRI16 R/W 0h Priority
16 - A packet TOS of 0d16 is mapped to this received packet
priority.
1367
SPRUH73H–October 2011–Revised April 2013 Ethernet Subsystem
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