Ethernet Subsystem Registers
www.ti.com
14.5.2.37 RX3_PENDTHRESH Register (offset = CCh) [reset = 0h]
RX3_PENDTHRESH is shown in Figure 14-65 and described in Table 14-76.
CPDMA_INT RECEIVE THRESHOLD PENDING REGISTER CHANNEL 3
Figure 14-65. RX3_PENDTHRESH Register
31 30 29 28 27 26 25 24
Reserved
R-0h
23 22 21 20 19 18 17 16
Reserved
R-0h
15 14 13 12 11 10 9 8
Reserved
R-0h
7 6 5 4 3 2 1 0
RX_PENDTHRESH
R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 14-76. RX3_PENDTHRESH Register Field Descriptions
Bit Field Type Reset Description
31-8 Reserved R 0h
7-0 RX_PENDTHRESH R/W 0h Rx Flow Threshold - This field contains the threshold value for
issuing receive threshold pending interrupts (when enabled).
1296
Ethernet Subsystem SPRUH73H–October 2011–Revised April 2013
Submit Documentation Feedback
Copyright © 2011–2013, Texas Instruments Incorporated
To Next Page
Loading...
Need help?
General
