USB Registers
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16.5.1.7 IRQDMATHOLDTX00 Register (offset = 100h) [reset = 0h]
IRQDMATHOLDTX00 is shown in Figure 16-28 and described in Table 16-36.
Figure 16-28. IRQDMATHOLDTX00 Register
31 30 29 28 27 26 25 24
DMA_THRES_TX0_3
R/W-0h
23 22 21 20 19 18 17 16
DMA_THRES_TX0_2
R/W-0h
15 14 13 12 11 10 9 8
DMA_THRES_TX0_1
R/W-0h
7 6 5 4 3 2 1 0
Reserved
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 16-36. IRQDMATHOLDTX00 Register Field Descriptions
Bit Field Type Reset Description
31-24 DMA_THRES_TX0_3 R/W 0h
DMA threshold value for tx_pkt_cmp_0 for USB0 Endpoint 3.
23-16 DMA_THRES_TX0_2 R/W 0h
DMA threshold value for tx_pkt_cmp_0 for USB0 Endpoint 2.
15-8 DMA_THRES_TX0_1 R/W 0h
DMA threshold value for tx_pkt_cmp_0 for USB0 Endpoint 1.
1768
Universal Serial Bus (USB) SPRUH73H–October 2011–Revised April 2013
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