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USB Registers
16.5.4.12 GPIO Register (offset = 30h) [reset = 0h]
GPIO is shown in Figure 16-145 and described in Table 16-156.
GPIO mode configurations and reads
Figure 16-145. GPIO Register
31 30 29 28 27 26 25 24
USEGPIOMODEREG GPIOMODE DPGPIOGZ DMGPIOGZ DPGPIOA DMGPIOA DPGPIOY DMGPIOY
R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R-0h R-0h
23 22 21 20 19 18 17 16
GPIO1P8VCONFIG GPIOCONFIG DMGPIOPIPD DPGPIOPIPD Reserved
R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h
15 14 13 12 11 10 9 8
Reserved
R/W-0h
7 6 5 4 3 2 1 0
Reserved
R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 16-156. GPIO Register Field Descriptions
Bit Field Type Reset Description
31 USEGPIOMODEREG R/W 0h
When set to 1 use bits 31 24 from this register instead of primary
inputs
30 GPIOMODE R/W 0h
Overrides the corresponding primary input
29 DPGPIOGZ R/W 0h
Overrides the corresponding primary input
28 DMGPIOGZ R/W 0h
Overrides the corresponding primary input
27 DPGPIOA R/W 0h
Overrides the corresponding primary input
26 DMGPIOA R/W 0h
Overrides the corresponding primary input
25 DPGPIOY R 0h
The GPIO Y output is stored here
24 DMGPIOY R 0h
The GPIO Y output is stored here
23 GPIO1P8VCONFIG R/W 0h
Overrides the corresponding primary input
22-20 GPIOCONFIG R/W 0h Used for configuring the GPIOs.
Details to be updated.
19 DMGPIOPIPD R/W 0h GPIO mode DM pull down enabled.
Overrides the corresponding primary input
18 DPGPIOPIPD R/W 0h GPIO mode DP pull-down enabled.
Overrides the corresponding primary input.
17-0 Reserved R/W 0h
1917
SPRUH73H–October 2011–Revised April 2013 Universal Serial Bus (USB)
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