Texas Instruments AM335 Series Technical Reference Manual

www.ti.com DCAN Registers
23.4.9 TXRQ_X Register (offset = 84h) [reset = 0h]
TXRQ_X is shown in Figure 23-27 and described in Table 23-22.
Example 1. Bit 0 of the transmission request X register represents byte 0 of the transmission request 1
register. If one or more bits in this byte are set, bit 0 of the transmission request X register will be set.
Figure 23-27. TXRQ_X Register
31 30 29 28 27 26 25 24
Reserved
R-0h
23 22 21 20 19 18 17 16
Reserved
R-0h
15 14 13 12 11 10 9 8
TxRqstReg8 TxRqstReg7 TxRqstReg6 TxRqstReg5
R-0h R-0h R-0h R-0h
7 6 5 4 3 2 1 0
TxRqstReg4 TxRqstReg3 TxRqstReg2 TxRqstReg1
R-0h R-0h R-0h R-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 23-22. TXRQ_X Register Field Descriptions
Bit Field Type Reset Description
31-16 Reserved R 0h
15-14 TxRqstReg8 R 0h
TxRqstReg8
13-12 TxRqstReg7 R 0h
TxRqstReg7
11-10 TxRqstReg6 R 0h
TxRqstReg6
9-8 TxRqstReg5 R 0h
TxRqstReg5
7-6 TxRqstReg4 R 0h
TxRqstReg4
5-4 TxRqstReg3 R 0h
TxRqstReg3
3-2 TxRqstReg2 R 0h
TxRqstReg2
1-0 TxRqstReg1 R 0h
TxRqstReg1
3935
SPRUH73H–October 2011–Revised April 2013 Controller Area Network (CAN)
Submit Documentation Feedback
Copyright © 2011–2013, Texas Instruments Incorporated

Texas Instruments AM335 Series Specifications

General

Brand	Texas Instruments
Model	AM335 Series
Category	Computer Hardware
Language	English