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Power, Reset, and Clock Management
Table 8-26. Core Logic Voltage and Power Domains
Logic Voltage Domain Name Module
CORE All Core Modules
RTC RTC
8.1.10.1 Voltage Domains
The core logic is divided into two voltage domains: VDD_CORE and VDD_RTC.
8.1.10.2 Power Domains
In order to reduce power due to leakage, the core logic supply voltage to 4 of these power domains can
be turned OFF with internal power switches. The internal power switches are controlled through memory
mapped registers in Control Module.
In a use case whereby all the modules within a power domain are not used that power domain can be
placed in the OFF state.
Error: Reference source not found shows the allowable combination power domain ON/OFF states and
which power domains are switched via internal power switches. At power-on-reset, all domains except
always-on will be in the power domain OFF state.
Table 8-27. Power Domain State Table
POWER DOMAIN
MODE WAKEUP MPU GFX PER RTC EFUSE
No Voltage
N/A N/A N/A N/A N/A N/A
Supply
Power On Reset ON OFF OFF OFF OFF OFF
ALL OTHER
FUNCTIONAL ON DON’T CARE DON’T CARE DON’T CARE DON’T CARE DON'T CARE
MODES
Internal Power
NO YES YES YES YES YES
Switch
8.1.11 Device Modules and Power Management Attributes List
Table 8-28. Power Domain of Various Modules
Power Supply Power Domain Modules OR Supply Destinations
(sinks)
Wake-CortexM3SS
L4_WKUP peripherals:
PRCM
Control Module
GPIO0
DMTIMER0_dmc
DMTIMER1
UART0
I2C0
TSC
WDT1
PD_WKUP SmartReflex_c2_0
This is non-switchable and cannot be shut
SmartReflex_c2_1
OFF
L4_WKUP
545
SPRUH73H–October 2011–Revised April 2013 Power, Reset, and Clock Management (PRCM)
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