Texas Instruments AM335 Series Technical Reference Manual

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111
0
T
Data in FIFO
www.ti.com Functional Description
19.3.8.3.4 Frequency Divider Values
The data transferred is a succession of pulse with a T period. Depending on the standards used, the T
period is defined through the DLL and DLH registers which defined the value to divide the functional clock
(48 MHz):
Dividing value = (FCLK/16)/Tfreq
Where FCLK = System clock frequency (48 MHz)
16 = real value of BAUD multiple
Tfreq = Effective frequency of the T pulse (MHz)
In an example case using a variable pulse duration definitions:
Figure 19-33. Variable Pulse Duration Definitions
For a logical “1”, the pulse duration is equal to 2T and for a logical “0”, it’s equal to 4T.
If T =0.56 ms, the value coded into the DLH and DLL register must be 1680 in decimal.
3495
SPRUH73H–October 2011–Revised April 2013 Universal Asynchronous Receiver/Transmitter (UART)
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Texas Instruments AM335 Series Specifications

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Brand	Texas Instruments
Model	AM335 Series
Category	Computer Hardware
Language	English