After 8
Initial
Master SPI Shift
WordA
WordB
After 8
Initial
Slave SPI Shift Register
WordB
WordC
Shift Register
Transmitter Buffer
Control
Master
Receiver Register
Shift Register
Transmitter Buffer
Slave
(Transmit Only)
SPIDAT
SPICLK
SPIEN (Optional)
Control
(Single Line)
After 8
Initial
Master SPI Shift
WordA
WordC
After 8
Initial
Slave SPI Shift Register
WordB
WordA
Shift Register
Transmitter Buffer
Control
Master
Receiver Register
Shift Register
Slave
(Receive Only)
Receiver Register
SPIDAT
SPICLK
SPIEN (Optional)
Control
(Single Line)
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Functional Description
24.3.1.2.1 Example With a Receive-Only Slave
Figure 24-4 shows a half duplex system with a Master device on the left and a receive-only Slave device
on the right. Each time a bit is transferred out from the Master, one bit is transferred in the Slave. After 8
cycles of the serial clock SPICLK, the 8-bit WordA has been transferred from the master to the slave.
Figure 24-4. SPI Half-Duplex Transmission (Receive-only Slave)
24.3.1.2.2 Example With a Transmit-Only Slave
Figure 24-5 shows a half duplex system with a Master device on the left and a transmit-only Slave device
on the right. Each time a bit is transferred out from the Slave, one bit is transferred in the Master. After 8
cycles of the serial clock SPICLK, the 8-bit WordA has been transferred from the slave to the master.
Figure 24-5. SPI Half-Duplex Transmission (Transmit-Only Slave)
3999
SPRUH73H–October 2011–Revised April 2013 Multichannel Serial Port Interface (McSPI)
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