DCAN Registers
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23.4.8 ABOTR Register (offset = 80h) [reset = 0h]
ABOTR is shown in Figure 23-26 and described in Table 23-21.
On write access to the CAN control register while Auto-Bus-On timer is running, the Auto-Bus-On
procedure will be aborted. During Debug/Suspend mode, running Auto-Bus-On timer will be paused.
Figure 23-26. ABOTR Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ABO_Time
R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 23-21. ABOTR Register Field Descriptions
Bit Field Type Reset Description
31-0 ABO_Time R/W 0h Number of OCP clock cycles before a Bus-Off recovery sequence is
started by clearing the Init bit.
This function has to be enabled by setting bit ABO in CAN control
register.
The Auto-Bus-On timer is realized by a 32 bit counter that starts to
count down to zero when the module goes Bus-Off.
The counter will be reloaded with the preload value of the ABO time
register after this phase.
3934
Controller Area Network (CAN) SPRUH73H–October 2011–Revised April 2013
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