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Mailbox
17.1.5.16 FIFOSTATUS_5 Register (offset = 94h) [reset = 0h]
FIFOSTATUS_5 is shown in Figure 17-18 and described in Table 17-30.
The message register stores the next to be read message of the mailbox. Reads remove the message
from the FIFO queue
Figure 17-18. FIFOSTATUS_5 Register
31 30 29 28 27 26 25 24
MESSAGEVALUEMBM
R/W-0
23 22 21 20 19 18 17 16
MESSAGEVALUEMBM
R/W-0
15 14 13 12 11 10 9 8
MESSAGEVALUEMBM
R/W-0
7 6 5 4 3 2 1 0
MESSAGEVALUEMBM FIFOFULLMBM
R/W-0 R-0
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 17-30. FIFOSTATUS_5 Register Field Descriptions
Bit Field Type Reset Description
31-1 MESSAGEVALUEMBM R/W-0 0 Message in Mailbox.
The message register stores the next to be read message of the
mailbox.
Reads remove the message from the FIFO queue.
0 FIFOFULLMBM R-0 0
Full flag for Mailbox
0 = NotFull : Mailbox FIFO is not full
1 = Full : Mailbox FIFO is full
3263
SPRUH73H–October 2011–Revised April 2013 Interprocessor Communication
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