USB Registers
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16.5.1.17 IRQDMATHOLDTX12 Register (offset = 128h) [reset = 0h]
IRQDMATHOLDTX12 is shown in Figure 16-38 and described in Table 16-46.
Figure 16-38. IRQDMATHOLDTX12 Register
31 30 29 28 27 26 25 24
DMA_THRES_TX1_11
R/W-0h
23 22 21 20 19 18 17 16
DMA_THRES_TX1_10
R/W-0h
15 14 13 12 11 10 9 8
DMA_THRES_TX1_9
R/W-0h
7 6 5 4 3 2 1 0
DMA_THRES_TX1_8
R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 16-46. IRQDMATHOLDTX12 Register Field Descriptions
Bit Field Type Reset Description
31-24 DMA_THRES_TX1_11 R/W 0h DMA threshold value for tx_pkt_cmp_0 for USB1 Endpoint 11.
23-16 DMA_THRES_TX1_10 R/W 0h DMA threshold value for tx_pkt_cmp_0 for USB1 Endpoint 10.
15-8 DMA_THRES_TX1_9 R/W 0h
DMA threshold value for tx_pkt_cmp_0 for USB1 Endpoint 9.
7-0 DMA_THRES_TX1_8 R/W 0h DMA threshold value for tx_pkt_cmp_0 for USB1 Endpoint 8.
USBSS IRQ_DMA_THRSHOLD_TX1_2 Register
1778
Universal Serial Bus (USB) SPRUH73H–October 2011–Revised April 2013
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