RTC_SS
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20.3.5.18 RTC_COMP_MSB_REG Register (offset = 50h) [reset = 0h]
RTC_COMP_MSB_REG is shown in Figure 20-78 and described in Table 20-81.
The COMP_MSB_REG is used to program the MSB value of the 32 kHz periods to be added to the 32
kHz counter every hour. This is used to compensate the oscillator drift. The COMP_MSB_REG works
together with the compensation (LSB) register (COMP_LSB_REG) to set the hourly oscillator
compensation value. The AUTOCOMP bit in the control register (CTRL_REG) must be enabled for
compensation to take place. This register must be written in two's complement. That means that to add
one 32-kHz oscillator period every hour, the ARM must write FFFFh into RTC_COMP_MSB_REG and
RTC_COMP_LSB_REG. To remove one 32-kHz oscillator period every hour, the ARM must write 0001h
into RTC_COMP_MSB_REG and RTC_COMP_LSB_REG. The 7FFFh value is forbidden.
Figure 20-78. RTC_COMP_MSB_REG Register
31 30 29 28 27 26 25 24
Reserved
R-0h
23 22 21 20 19 18 17 16
Reserved
R-0h
15 14 13 12 11 10 9 8
Reserved
R-0h
7 6 5 4 3 2 1 0
RTC_COMP_MSB
R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 20-81. RTC_COMP_MSB_REG Register Field Descriptions
Bit Field Type Reset Description
31-8 Reserved R 0h
7-0 RTC_COMP_MSB R/W 0h Indicates number of
32-kHz periods to be added into the
32-kHz counter every hour
3652
Timers SPRUH73H–October 2011–Revised April 2013
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