Ethernet Subsystem Registers
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14.5.8.8 GAP_THRESH Register (offset = 1Ch) [reset = Bh]
GAP_THRESH is shown in Figure 14-191 and described in Table 14-208.
CPGMAC_SL SHORT GAP THRESHOLD
Figure 14-191. GAP_THRESH Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved GAP_THRESH
R/W-0
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 14-208. GAP_THRESH Register Field Descriptions
Bit Field Type Reset Description
4-0 GAP_THRESH R/W-0 0 CPGMAC_SL Short Gap Threshold - This is the CPGMAC_SL
associated FIFO transmit block usage value for triggering
TX_SHORT_GAP.
1432
Ethernet Subsystem SPRUH73H–October 2011–Revised April 2013
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