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DMTimer
20.1.5.12 TTGR Register (offset = 44h) [reset = FFFFFFFFh]
TTGR is shown in Figure 20-20 and described in Table 20-22.
The read value of this register is always FFFF FFFFh.
Figure 20-20. TTGR Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
TTGR_VALUE
R/W-FFFFFFFFh
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 20-22. TTGR Register Field Descriptions
Bit Field Type Reset Description
31-0 TTGR_VALUE R/W FFFFFFFFh Writing in the TTGR register, TCRR will be loaded from TLDR and
prescaler counter will be cleared.
Reload will be done regardless of the AR field value of TCLR
register.
3579
SPRUH73H–October 2011–Revised April 2013 Timers
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